課程大綱(Course Outline)
We will start with a discussion to Electronic System Level design methodology (ESL.) In this section students should have the awareness why ESL is needed in today's system designs, what ESL can do and its fundamental methodology. And we move into the learning of behavior coding and the use of High Level Synthesis (HLS.) An industrial grade High-Level Synthesis (HLS) tool will be employed to facilitate the training. Then we start to learn Transaction Level Modeling 2.0, a library in SystemC 2.3 and the industry standard of system modeling. Students will be trained how to design hardware components and systems in TLM 2.0. A System Simulator will be employed to facilitate the training. Students are required to use HLS to design and synthesize HW components given in assignments, and then using the System Simulator to complete a simple system that comprised of these components. This simple system is expected to work not only at behavior level but also at RTL codes directly synthesized out of behavior codes.